Standard

IEEE 1800-2009

Révisé

Note: Actuellement en cours d'élaboration: IEEE 1800-2023

Amendements et versions existants ou nouveaux doivent être achetés séparément.

Langue
Format

Résumé

Revision Standard - Superseded. This standard represents a merger of two previous standards: IEEE Std 1364(TM)-2005 Verilog hardware description language (HDL) and IEEE Std 1800-2005 SystemVerilog unified hardware design, specification, and verification language. The 2005 SystemVerilog standard defines extensions to the 2005 Verilog standard. These two standards were designed to be used as one language. Merging the base Verilog language and the SystemVerilog extensions into a single standard provides users with all information regarding syntax and semantics in a single document. (IEEE Std1800-2009 was a revision of both IEEE Std1364-2005 and IEEE Std1800-2005.)

Spécifications des produits

  • Standard de IEEE
  • Publié:
  • Type de document: IS
  • Pages
  • Editeur: IEEE
  • Distributeur: IEEE
  • ICS: 35.060
  • Comité national: IEEE Computer Society / Design Automation

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