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Standard

IEEE 1076.6-2004

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Note: Version actuelle: IEEE 1076.6-1999

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Résumé

Revision Standard - Inactive-Withdrawn. This document specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors.

Spécifications des produits

  • Standard de IEEE
  • Publié:
  • Radié:
  • Type de document: IS
  • Pages
  • Editeur: IEEE
  • Distributeur: IEEE
  • ICS: 35.060
  • Comité national: IEEE Computer Society / Design Automation

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