Standard

IEEE 1076.6-2004

Oct 2004 Withdrawn

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Language English

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Abstract

Revision Standard - Inactive-Withdrawn. This document specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors.

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Standard from IEEE
Published: October 11 2004
Withdrawn: January 9 2010
Document type: IS
Pages
ISBN: 978-0-7381-4065-0

Publisher: IEEE
Distributor: IEEE
ICS: 35.060
National Committee: IEEE Computer Society / Design Automation

Product Relations

Referred by: IEEE 1850-2010
Refers: IEEE 61691-1-1-2004
Revises: IEEE 1076.6-1999
Refers: IEEE 1076.3-1997
Refers: IEEE 1164-1993

Extended editions Extended editions (0)

Version history Related Corrigenda and Amendments (0)

Version history History (2)

IEEE 1076.6-2004

IEEE 1076.6-1999

Abstract

Products specifications

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