Standard

IEC 62530:2007 ED1

Nov 2007 Revised

Note: Latest version: IEC 62530:2021 ED3

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Language English

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Abstract

Specifies extensions for a higher level of abstraction for modeling and verification with the Verilog hardware description language (HDL). This standard includes design specification methods, embedded assertions language, testbench language including coverage and assertions application programming interface (API), and a direct programming interface (DPI)>

Products specifications

Standard from IEC
Published: November 7 2007
Withdrawn: May 19 2011
Edition: 1
Document type: IS
Pages
ISBN: 2831893496

Publisher: IEC
Distributor: IEC
ICS: 25.040.01
International TC: TC 91

Product Relations

Revised by: IEC 62530:2011 ED2

IEC 62530:2007 ED1

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IEC 62530:2021 ED3

IEC 62530:2011 ED2