Standard

IEC 61691-6:2009 ED1

Dec 2009 Revised

Note: Latest version: IEC 61691-6:2021 ED2

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Abstract

IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.

Products specifications

Standard from IEEE
Published: December 14 2009
Withdrawn: June 8 2021
Edition: 1
Document type: IS
Pages
ISBN: 9780738162836

Publisher: IEEE
Distributor: IEEE
ICS: 25.040.01
ICS: 35.060
International TC: TC 91

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Revised by: IEC 61691-6:2021 ED2

IEC 61691-6:2009 ED1

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IEC 61691-6:2021 ED2