IEC 61691-6:2009 ED1


Note: Latest version: IEC 61691-6:2021 ED2

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IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.

Products specifications

  • Standard from IEEE
  • Published:
  • Withdrawn:
  • Edition: 1
  • Document type: IS
  • Pages
  • Publisher: IEEE
  • Distributor: IEEE
  • ICS: 25.040.01
  • ICS: 35.060
  • International TC: TC 91

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